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lt1881/LT1882 1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. the lt ? 1881 and LT1882 op amps bring high accuracy input performance to amplifiers with rail-to-rail output swing. input bias currents and capacitive load driving capabilities are superior to the similar lt1884 and lt1885 amplifiers, at the cost of a slight loss in speed. input offset voltage is trimmed to less than 50 m v and the low drift maintains this accuracy over the operating tempera- ture range. input bias currents are an ultralow 200pa maximum. the amplifiers work on any total power supply voltage between 2.7v and 36v (fully specified from 5v to 15v). output voltage swings to within 40mv of the negative supply and 220mv of the positive supply make these amplifiers good choices for low voltage single supply operation. capacitive loads up to 1000pf can be driven directly in unity-gain follower applications. the dual lt1881 and lt1881a are available with standard pinouts in s8 and pdip packages. the quad LT1882 is in a 14-pin so package. for a higher speed device with similar dc specifications, see the lt1884/lt1885. n thermocouple amplifiers n bridge transducer conditioners n instrumentation amplifiers n battery-powered systems n photo current amplifiers , ltc and lt are registered trademarks of linear technology corporation. n offset voltage: 50 m v maximum (lt1881a) n input bias current: 200pa maximum (lt1881a) n offset voltage drift: 0.8 m v/ c maximum n rail-to-rail output swing n supply range: 2.7v to 36v n operates with single or split supplies n open-loop voltage gain: 1 million minimum n 1ma maximum supply current per amplifier n stable at a v = 1, c l = 1000pf n standard pinouts applicatio s u features descriptio u typical applicatio u dual and quad rail-to-rail output, picoamp input precision op amps april 2000 final electrical specifications ?v 5v 33pf v out 4.096v to 4.096v ltc 1597 dac + lt1881 + lt1881 1881/2 ta01 ?v r com r ofs ref r1 5v 1.65k lt1634 4.096v 5v 16-bit voltage output dac on 5v supply input offset voltage drift ( v/ c) 1 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 0.9 0.7 0.5 0.3 0.1 0.1 0.3 0.5 0.7 0.9 1 percent of units (%) 1881/2 ta01a 26 24 22 20 18 16 14 12 10 8 6 4 2 0 v s = 15v 40 n8 (1 lot) 144 s8 (2 lots) 184 total parts tc v os distribution, industrial grade
lt1881/LT1882 2 supply voltage (v + to v C ) ....................................... 40v differential input voltage (note 2) ......................... 10v input voltage .................................................... v + to v C input current (note 2) ........................................ 10ma output short-circuit duration (note 3) ............ indefinite order part number s8 part marking t jmax = 150 c, q ja = 130 c/w (n8) t jmax = 150 c, q ja = 190 c/w (s8) consult factory for military grade parts. 1881 1881i 1881a 1881ai lt1881cn8 lt1881in8 lt1881cs8 lt1881is8 lt1881acn8 lt1881ain8 lt1881acs8 lt1881ais8 absolute axi u rati gs w ww u package/order i for atio uu w electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage (lt1881a) 25 50 m v 0 c < t a < 70 c l 85 m v C40 c < t a < 85 c l 110 m v input offset voltage (lt1881/LT1882) 30 80 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 150 m v input offset voltage drift 0 c < t a < 70 c l 0.3 0.8 m v/ c (note 6) C 40 c < t a < 85 c l 0.3 0.8 m v/ c i os input offset current (lt1881a) 100 200 pa 0 c < t a < 70 c l 250 pa C40 c < t a < 85 c l 300 pa input offset current (lt1881/LT1882) 150 500 pa 0 c < t a < 70 c l 600 pa C40 c < t a < 85 c l 700 pa s8 package 8-lead plastic so n8 package 8-lead pdip 1 2 3 4 8 7 6 5 top view v + out b in b +in b out a in a +in a v b a operating temperature range (note 4) .. C 40 c to 85 c specified temperature range (note 5) ... C 40 c to 85 c maximum junction temperature .......................... 150 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a ?n a +in a v + +in b ?n b out b out d ?n d +in d v +in c ?n c out c d a d b order part number LT1882cs LT1882is t jmax = 150 c, q ja = 150 c/w (note 1)
lt1881/LT1882 3 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units i b input bias current (lt1881a) 100 200 pa 0 c < t a < 70 c l 250 pa C40 c < t a < 85 c l 300 pa input bias current (lt1881/LT1882) 150 500 pa 0 c < t a < 70 c l 600 pa C40 c < t a < 85 c l 700 pa input noise voltage 0.1hz to 10hz 0.5 m v p-p e n input noise voltage density f = 1khz 14 nv/ ? hz i n input noise current density f = 1khz 0.03 pa/ ? hz v cm input voltage range v ee + 1.0 v cc C 1.0 v l v ee + 1.2 v cc C 1.2 v cmrr common mode rejection ratio 1v < v cm < 4v 106 128 db 1.2v < v cm < 3.8v l 104 db psrr power supply rejection ratio v ee = 0, v cm = 1.5v 0 c < t a < 85 c, 2.7v < v cc < 32v l 106 132 db t a = C40 c, 3v < v cc < 32v 106 132 db minimum operating supply voltage l 2.4 2.7 v a vol large-signal voltage gain r l = 10k; 1v < v out < 4v 500 1600 v/mv l 350 v/mv r l = 2k; 1v < v out < 4v 300 800 v/mv l 250 v/mv r l = 1k; 1v < v out < 4v 250 400 v/mv l 200 v/mv v ol output voltage swing low no load l 20 40 mv i sink = 100 m a l 25 50 mv i sink = 1ma l 70 150 mv i sink = 5ma l 270 600 mv v oh output voltage swing high no load l 120 220 mv (referred to v cc )i source = 100 m a l 130 230 mv i source = 1ma l 180 300 mv i source = 5ma l 360 600 mv i s supply current per amplifier v cc = 3v 0.45 0.65 0.85 ma l 1.2 ma v cc = 5v 0.5 0.65 0.9 ma l 1.4 ma v cc = 12v 0.5 0.70 1.0 ma l 1.5 ma i sc short-circuit current v out short to gnd l 15 30 ma v out short to v cc l 15 30 ma gbw gain-bandwidth product f = 20khz 0.5 1.0 mhz t s settling time 0.01%, v out = 1.5v to 3.5v, 30 m s a v = C1, r l = 2k sr + slew rate positive a v = C 1 0.15 0.35 v/ m s l 0.12 v/ m s sr C slew rate negative a v = C 1 0.11 0.18 v/ m s l 0.08 v/ m s
lt1881/LT1882 4 electrical characteristics symbol parameter conditions min typ max units the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. single supply operation v ee = 0, v cc = 5v; v cm = v cc /2 unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage (lt1881a) 25 50 m v 0 c < t a < 70 c l 85 m v C40 c < t a < 85 c l 110 m v input offset voltage (lt1881/LT1882) 30 80 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 150 m v input offset voltage drift 0 c < t a < 70 c l 0.3 0.8 m v/ c (note 6) C 40 c < t a < 85 c l 0.3 0.8 m v/ c i os input offset current (lt1881a) 150 200 pa 0 c < t a < 70 c l 250 pa C40 c < t a < 85 c l 300 pa input offset current (lt1881/LT1882) 150 500 pa 0 c < t a < 70 c l 600 pa C40 c < t a < 85 c l 700 pa i b input bias current (lt1881a) 150 200 pa 0 c < t a < 70 c l 250 pa C40 c < t a < 85 c l 300 pa input bias current (lt1881/LT1882) 150 500 pa 0 c < t a < 70 c l 600 pa C40 c < t a < 85 c l 700 pa input noise voltage 0.1hz to 10hz 0.5 m v p-p e n input noise voltage density f = 1khz 14 nv/ ? hz i n input noise current density f = 1khz 0.03 pa/ ? hz v cm input voltage range v ee + 1.0 v cc C 1.0 v l v ee + 1.2 v cc C 1.2 v d v os offset voltage match (lt1881a) (note 7) 30 70 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 160 m v offset voltage match (lt1881/LT1882) (note 7) 35 125 m v 0 c < t a < 70 c l 175 m v C40 c < t a < 85 c l 235 m v offset voltage match drift (notes 6, 7) l 0.4 1.2 m v/ c d i b + noninverting bias current match (notes 7, 8) 200 300 pa (lt1881a) 0 c < t a < 70 c l 400 pa C40 c < t a < 85 c l 500 pa noninverting bias current match (notes 7, 8) 250 700 pa (lt1881/LT1882) 0 c < t a < 70 c l 900 pa C40 c < t a < 85 c l 1000 pa d cmrr common mode rejection match (notes 7, 9) l 102 125 db d psrr power supply rejection match v ee = 0, v cm = 1.5v (notes 7, 9) 0 c < t a < 85 c, 2.7v < v cc < 32v l 104 126 db t a = C40 c, 3v < v cc < 32v 104 126 db the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5)
lt1881/LT1882 5 electrical characteristics symbol parameter conditions min typ max units the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5) cmrr common mode rejection ratio C13.5v < v cm < 13.5v l 114 130 db +psrr positive power supply rejection ratio v ee = C15, v cm = 0; 1.5v < v cc < 18v l 110 132 db Cpsrr negative power supply rejection ratio v cc = 15, v cm = 0; C1.5v < v ee < C18v l 106 132 db minimum operating supply voltage l 1.2 1.35 v a vol large-signal voltage gain r l = 10k; C13.5v < v out < 13.5v 1000 1600 v/mv l 700 v/mv r l = 2k; C13.5v < v out < 13.5v 175 420 v/mv l 125 v/mv r l = 1k; C12v < v out < 12v 90 230 v/mv l 65 v/mv v ol output voltage swing low no load l 20 40 mv (referred to v ee )i sink = 100 m a l 25 50 mv i sink = 1ma l 70 150 mv i sink = 5ma l 270 600 mv v oh output voltage swing high no load l 160 220 mv (referred to v cc )i source = 100 m a l 160 230 mv i source = 1ma l 180 300 mv i source = 5ma l 360 600 mv i s supply current per amplifier v s = 15v 0.5 0.85 1.1 ma l 1.6 ma i sc short-circuit current v out short to v ee 20 40 ma l 15 40 ma v out short to v cc 20 30 ma l 15 30 ma gbw gain-bandwidth product f = 20khz 0.6 1.1 mhz t s settling time 0.01%, v out = C 5v to 5v, 35 m s a v = C1, r l = 2k sr + slew rate positive a v = C 1 0.21 0.4 v/ m s l 0.18 v/ m s sr C slew rate negative a v = C 1 0.13 0.20 v/ m s l 0.1 v/ m s d v os offset voltage match (lt1881/LT1882) (note 5) 42 125 m v 0 c < t a < 70 c l 175 m v C40 c < t a < 85 c l 235 m v offset voltage match (lt1881a) 35 70 m v 0 c < t a < 70 c l 125 m v C40 c < t a < 85 c l 160 m v offset voltage match drift (notes 6, 7) l 0.4 1.1 m v/ c d i b + noninverting bias current match (notes 7, 8) 240 700 pa (lt1881/LT1882) 0 c < t a < 70 c l 900 pa C40 c < t a < 85 c l 1000 pa noninverting bias current match 200 300 pa (lt1881a) 0 c < t a < 70 c l 400 pa C40 c < t a < 85 c l 500 pa d cmrr common mode rejection match (notes 7, 9) l 110 125 db
lt1881/LT1882 6 note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the inputs are protected by internal resistors and back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current should be limited externally to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: the lt1881c, LT1882c, lt1881i and LT1882i are guaranteed functional over the operating temperature range of C 40 c to 85 c. note 5: the lt1881c and LT1882c are designed, characterized and expected to meet specified performance from C 40 c to 85 c but are not tested or qa sampled at these temperatures. the lt1881i and LT1882i are guaranteed to meet specified performance from C 40 c to 85 c. note 6: this parameter is not 100% tested. note 7: matching parameters are the difference between amplifiers a and b in the lt1881; and between amplifiers a and d and b and c in the LT1882. note 8: this parameter is the difference between the two noninverting input bias currents. note 9: d cmrr and d psrr are defined as follows: cmrr and psrr are measured in m v/v on each amplifier. the difference is calculated in m v/v and then converted to db. typical perfor a ce characteristics uw supply current per amplifier vs supply voltage slew rate vs supply voltage slew rate vs temperature electrical characteristics symbol parameter conditions min typ max units the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5) d +psrr positive power supply rejection match v ee = C 15v, v cm = 0v, l 108 130 db 1.5v < v cc < 18v, (notes 7, 9) d Cpsrr negative power supply rejection match v cc = 15v, v cm = 0v, l 104 130 db C 1.5v < v ee < C 18v, (notes 7, 9) total supply voltage (v) supply current per amplifier ( a) 1881/2 g01 1200 1000 800 600 400 200 0 125 c 25 c ?5 c 0 4 8 12 16 20 24 28 32 36 total supply voltage (v) 0 slew rate (v/ s) 1881/2 g02 4 8 12 16 20 24 28 32 36 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 falling rising a v = 1 temperature ( c) ?0 slew rate (v/ s) 1881/2 g03 ?5 0 25 50 75 100 125 150 0.5 0.4 0.3 0.2 0.1 0 falling rising v s = 15v v s = 5v v s = 15v v s = 5v
lt1881/LT1882 7 settling time vs output step settling time vs output step gain bandwidth product vs supply voltage settling time ( s) 0 output step (v) 1881/2 g04 5 10 15 20 25 30 35 40 45 50 55 60 65 10 8 6 4 2 0 ? ? ? ? ?0 v s = 15v a v = ? 0.1% 0.01% 0.1% 0.01% settling time ( s) 0 output step (v) 1881/2 g05 5 10 15 20 25 30 35 40 45 50 55 60 65 10 8 6 4 2 0 ? ? ? ? ?0 v s = 15v a v = 1 0.1% 0.01% 0.1% 0.01% total supply voltage (v) 0 gain bandwidth product (khz) 1881/2 g06 4 8 12 16 20 24 28 32 36 900 850 800 750 700 650 600 ?5 c 125 c 25 c typical perfor a ce characteristics uw phase margin vs supply voltage gain vs frequency, a v = C1 gain vs frequency, a v = 1 total supply voltage (v) 0 phase margin (deg) 1881/2 g07 4 8 12 16 20 24 28 32 36 60 58 56 54 52 50 48 46 125 c ?5 c 125 c frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 10 0 ?0 ?0 ?0 ?0 v s = 15v v s = 2.5v 1881/2 g08 frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 10 0 ?0 ?0 ?0 ?0 v s = 15v v s = 2.5v 1881/2 g09 frequency (hz) 1k gain (db) 1881/2 g10 10k 100k 1m 10m 100m 10 0 ?0 ?0 ?0 ?0 0pf 1500pf v s = 15v 1000pf 500pf gain vs frequency with c load , a v = 1 frequency (hz) 1k gain (db) 1881/2 g11 10k 100k 1m 10m 100m 10 0 ?0 ?0 ?0 ?0 1800pf v s = 15v 1000pf 500pf 0pf gain vs frequency with c load , a v = C1
lt1881/LT1882 8 typical perfor a ce characteristics uw large signal response, a v = C1 time (50 m s/div) 1881/2 g12 v out (5v/div) large signal response, a v = 1 time (50 m s/div) 1881/2 g13 v out (5v/div) small signal response, a v = C1, no load time (2 m s/div) 1881/2 g14 v out (20mv/div) small signal response, a v = C1, c l = 1000pf time (2 m s/div) 1881/2 g15 v out (20mv/div) small signal response, a v = 1, r l = 2k time (2 m s/div) 1881/2 g16 v out (20mv/div) small signal response, a v = 1, c l = 500pf time (2 m s/div) 1881/2 g17 v out (20mv/div)
lt1881/LT1882 9 applicatio s i for atio wu u u the lt1881 dual and LT1882 quad op amps feature exceptional input precision with rail-to-rail output swing. the amplifiers are similar to the lt1884 and lt1885 devices. the lt1881 and LT1882 offer superior capacitive load driving capabilities over the lt1884 and lt1885 in low voltage gain configurations. offset voltages are trimmed to less than 50 m v and input bias currents are less than 200pa on the a grade devices. obtaining beneficial advantage of these precision input characteristics de- pends upon proper applications circuit design and board layout. preserving input precision preserving the input voltage accuracy of the lt1881/ LT1882 requires that the applications circuit and pc board layout do not introduce errors comparable to or greater than the 30 m v offset. temperature differentials across the input connections can generate thermocouple voltages of 10s of microvolts. pc board layouts should keep connec- tions to the amplifiers input pins close together and away from heat dissipating components. air currents across the board can also generate temperature differentials. the extremely low input bias currents, 150pa, allow high accuracy to be maintained with high impedance sources and feedback networks. the lt1881/LT1882s low input bias currents are obtained by using a cancellation circuit on-chip. this causes the resulting i bias + and i bias C to be uncorrelated, as implied by the i os specification being greater than the i bias . the user should not try to balance the input resistances in each input lead, as is commonly recommended with most amplifiers. the impedance at either input should be kept as small as possible to mini- mize total circuit error. pc board layout is important to insure that leakage cur- rents do not corrupt the low i bias of the amplifier. in high precision, high impedance circuits, the input pins should be surrounded by a guard ring of pc board interconnect, with the guard driven to the same common mode voltage as the amplifier inputs. input common mode range the lt1881 and LT1882 outputs are able to swing nearly to each power supply rail, but the input stage is limited to operating between v ee + 0.8v and v cc C 0.9v. exceeding this common mode range will cause the gain to drop to zero; however, no gain reversal will occur. input protection the inverting and noninverting input pins of the lt1881 and LT1882 have limited on-chip protection. esd protec- tion is provided to prevent damage during handling. the input transistors have voltage clamping and limiting resis- tors to protect against input differentials up to 10v. short transients above this level will also be tolerated. if the input pins can see a sustained differential voltage above 10v, external limiting resistors should be used to prevent damage to the amplifier. a 1k resistor in each input lead will provide protection against a 30v differential voltage. capacitive loads the lt1881 and LT1882 can drive capacitive loads up to 1000pf in unity-gain. the capacitive load driving in- creases as the amplifier is used in higher gain configura- tions. capacitive load driving may be increased by decoupling the capacitance from the output with a small resistance.
lt1881/LT1882 10 n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) package descriptio u dimensions in inches (millimeters) unless otherwise noted. n8 1098 0.100 (2.54) bsc 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm)
lt1881/LT1882 11 s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
lt1881/LT1882 12 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 2000 18812is, sn18812 lt/tp 0400 4k ? printed in usa related parts typical applicatio u part number description comments lt1112/lt1114 dual/quad picoamp input op amp v os = 60 m v max lt1677 gain programmable instrumentation amp gain error = 0.08% max lt1793 low noise jfet op amp i b = 10pa max lt1884/lt1885 dual/quad picoamp input op amp 3 times faster than lt1881/LT1882 ltc2050 zero drift op amp in sot-23 v os = 3 m v max, rail-to-rail output C50 c to 600 c digital thermometer operates on 3.3v + a1 1/2 lt1881 + a2 1/2 lt1881 r f 1k 10k 0.1% rt: omega f4132 1000 rtd r1, r2, r3, rf: use bi 698-3 2k 8 resistor network 1881/2 ta02 v cc v cc r t r3 1k r1 4k r2 4k v cc = 3.3v 10k 0.1% v = + 1.588mv/ c v cc 2 v ref v cc 1 f +in clk ltc1287 ?n d out gnd cs/shdn

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